Recently, packaging is more and more important in microelectronic industry. The performance of package is an important factor to the effect of the other components. The factors in packaging comprise size, weight, cost, number of pins, power suffered, and the latency between chips. Thus, a preferred packaging must consider the factors of material, construction, and electric property in order to achieve the requirement of a specification by a minimum cost and to have a better reliability.
As shown in FIG. 1, a general semiconductor package structure with groove, for example, a packaging structure used in CCD or other photoelectric elements, is illustrated. As shown in the figure, this semiconductor package structure serves to package a photoelectric element and includes a substrate for bearing such photoelectric element, bonding wires for electrically connecting components to the substrate, a transparent cover or potting resin covered thereon for protecting packaging element.
As shown in FIG. 1, the substrate 100 has a groove in the middle portion thereof and a wall is formed on the periphery thereof. Traces are arranged on the substrate so that the semiconductor element packaged therein may be electrically connected to the outer circuit by bonding wires.
In general, substrates used in semiconductor package can be formed by ceramic material in order to have a preferred hermetic, or formed of industrial plastic materials, such as BT, through molding. However, ceramics are expensive, and are difficult to be finished. While substrates formed by general BT or other plastic materials with groove are difficult in developing a mold. This is not preferred for electronic industry or photoelectric industry which are developed quickly.